Software or other computing programs, such as programs expressed in C and C++ code, have been profiled in the prior art, as a method of determining performance of the program as executed, generally using criteria such as estimated power consumption, speed of execution, code size, integrated circuit (IC) area utilized in execution, and other performance measures. Such current profiling techniques, as a consequence, have been confined largely to the processor (microprocessor) computing environment, for example, to identify algorithms which may be separately accelerated in an application specific integrated circuit (ASIC), or to provide statistics on processor or program performance.
Current profiling techniques are generally statistical or intrusive. In statistical profiling, an interrupt is generated, which then allows the capture of various register contents or counters. This type of profiling then provides statistics, such as how often the program executes a particular algorithm or routine. One widely used hardware profiler, for example, requires the user to stop the central processing unit (CPU) during program execution, and use special debugging registers to generate a profile.
Other existing profiling techniques are typically intrusive. In this method, extra lines of programming code are actually inserted periodically into the program code to be profiled. As these inserted code segments are called, hard counts may be generated, reflecting usage of a corresponding algorithm or routine.
Both statistical profiling and intrusive profiling have significant limitations. For example, depending upon the granularity or degree to which code has been inserted or interrupts generated, both methodologies may typically miss or overlook code features between such points of intrusion or interrupt.
In addition, measures of power and performance based upon such current statistical or intrusive profiling may be significantly inaccurate. Such power and performance measures are typically based upon various underlying assumptions, such as data pipeline length, and exhibit strong data dependencies, such as depending upon the sequence of logic 1s and 0s (i.e., high and low voltages) within a particular data stream. In addition, such power and performance measures also depends significantly upon program dynamics, such that statistical or intrusive profiling often provides inaccurate results compared to actual performance of the program. As a consequence, because current profiling techniques do not account for data issues and concerns, they tend to be significantly inaccurate.
Finally, the existing profilers can measure program performance in known computing architectures or processor architectures only; no profilers exist for profiling program execution for an integrated circuit that is reconfigurable or adaptive. In the reconfigurable hardware environment, the combination of hardware computational units, their interconnections, the proximity of data to these computation units, and the algorithms to be performed by the circuit, each contribute to overall efficiency of execution. Existing profiling tools do not address the impact of each of these variables.